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MCQ | 8255 PPI (Programmable peripheral interface)
Multiple choice questions and answers (MCQ) on the 8255 programmable peripheral interface (PPI) with 4 choices, correct answer and explanation.
Submitted by Monika Sharma, on February 10, 2021
Question 1: How many pins does the 8255 PPI IC contains?
- 24
- 20
- 32
- 40
Answer: d. 40
Question 2: In which mode do all the Ports of the 8255 PPI work as Input-Output units for data transfer?
- BSR mode
- Mode 0 of I/O mode
- Mode 1 of I/O mode
- Mode 2 of I/O mode
Answer: b. Mode 0 of I/O mode
Question 3: Which of the following pins are responsible for handling the on the Read Write control logic unit of the 8255 PPI?
- CS'
- RD'
- WR'
- ALL of the above
Answer: d. All of the above
Question 4: In which of the following modes is the 8255 PPI capable of transferring data while handshaking with the interfaced device?
- BSR mode
- Mode 0 of I/O mode
- Mode 1 of I/O mode
- Mode 2 of I/O mode
Answer: c. Mode 1 of I/O mode
Question 5: How many bits of data can be transferred between the 8255 PPI and the interfaced device at a time? or What is the size of internal bus of the 8255 PPI?
- 16 bits
- 12 bits
- 8 bits
- None of the above
Answer: c. 8 bits
Question 6: Which port of the 8255 PPI is capable of performing the handshaking function with the interfaced devices?
- Port A
- Port B
- Port C
- All of the above
Answer: c. Port C
Question 7: In which of the following modes of the 8255 PPI, only port C is taken into consideration?
- BSR mode
- Mode 0 of I/O mode
- Mode 1 of I/O mode
- Mode 2 of I/O mode
Answer: a. BSR mode
Question 8: In mode 2 of I/O mode, which of the following ports are capable of transferring the data in both the directions?
- Port A
- Port B
- Port C
- All of the above
Answer: a. Port A
Question 9: In which of the following modes we do not consider the D6, D5 and D4 bits of the control word?
- BSR mode
- Mode 0 of I/O mode
- Mode 1 of I/O mode
- Mode 2 of I/O mode
Answer: a. BSR mode
Question 10: How many data lines in total are there in the 8255 PPI IC?
- 8 data lines
- 32 data lines
- 24 data lines
- None of the above
Answer: c. 24 data lines
Question 11: PPI 8255 is a general purpose programmable I/O device designed to interface the CPU with its outside world such as ADC, DAC, keyboard etc.
- True
- False
Answer: a. True
Explanation:
PPI 8255 is a general purpose programmable I/O device which is specifically designed to interface the CPU with its outside world such as ADC, DAC, keyboard etc.
Question 12: During process a data bus buffer has controlled using,
- Control word register
- Data bus
- R/W control logic
- None of these
Answer: b. Data bus
Explanation:
During process a data bus buffer has controlled using read/write control logic.
Question 13: The 8255 ports works in the I/O mode,
- Programmable I/O ports
- Set pins
- Reset pins
- None of these
Answer: a. Programmable I/O ports
Explanation:
The 8255 ports work in the I/O mode as programmable I/O ports.
Question 14: PPI 8255 consists of three 8-bit bidirectional I/O ports,
- PORT A,
- PORT B
- PORT C
- All of these
Answer: d. All of these
Explanation:
PPI 8255 consists of three 8-bit bidirectional I/O ports as PORT A, PORT B, and PORT C.
Question 15: PPI 8255 consists of 40 pins and operates in ... regulated power supply,
- +5V
- +15V
- +5V
- None of these
Answer: a. +5V
Explanation:
PPI 8255 consists of 40 pins and operates in +5V regulated power supply.
Question 16: Strobed input/output mode is also known as -
- Mode 0
- Mode 1
- Mode 2
- None of these
Answer: b. Mode 1
Explanation:
In this mode, the input or output operation of the specified port is controlled by handshaking signals.
Question 17: The strobed input/output mode is another name of,
- Mode 0
- Mode 1
- Mode 2
- None of these
Answer: b. Mode 1
Explanation:
In this mode, the handshaking signals control the input or output action of the specified port.
Question 18: The pulse width of the INIT signal at the receiving terminal must be greater than ... that of the receiving terminal –
- 10 microseconds
- 50 microseconds
- 40 microseconds
- 20 microseconds
Answer: b. 50 microseconds
Explanation:
The pulse width of a signal at the receiving terminal must be more than 50 microseconds.
Question 19: The feature of mode 2 of 8255 is,
- Both inputs and outputs are latched
- Port C is used for generating handshake signals
- Single 8-bit port is available
- All of these
Answer: d. All of these
Explanation:
A single 8-bit port is available in mode 2 of 8255, i.e., group A.
Question 20: The port which is used in mode 1 or mode 2 for the generation of handshake lines is,
- Port A
- Port B
- Port C Upper
- Port C Lower
Answer: d. Port C Lower
Explanation:
The upper Port C is used for the generation of mode 1 or mode 2 handshake lines.
Question 21: The pin that clears the control word register of 8255 when enabled is,
- RESET
- SET
- CLEAR
- CLK
Answer: a. RESET
Explanation:
If the reset pin is allowed, then the register of control words is cleared.
Question 22: The signals that are provided to maintain proper data flow and synchronization between the data transmitter and receiver are –
- Handshaking signals
- Control signals
- Input signals
- None of these
Answer: a. Handshaking signals
Explanation:
Handshaking signals preserve proper flow and synchronization of information. In order to create a valid link between two stations, signals are transmitted back and forth via a communications network. In an RS-232 serial transmission, a "hardware handshake" utilizes dedicated wires such as request-to-send (RTS) and clear-to-send (CTS) lines.
Question 23: From pin PA0 – PA7 are the part of -
- Pins of port A
- Pins of port B
- Pins of port C
- None of these
Answer: a. Pins of port A
Explanation:
There are 24 input/output pins for the 8255. These are split into three ports that are 8-bit (A, B, C). It is possible to use Port A and Port B as 8-bit input/output ports. Pins of port A consist pins from pin PA0 – PA7.Port C can be used either as an 8-bit input/output port or as two 4-bit input/output ports or for ports A and B to create handshake signals.
Question 24: In the pin diagram of PIP 8255, CS stands for Chip select,
- True
- False
Answer: a. True
Explanation:
In the pin diagram of PIP 8255, CS stands for Chip select. Chip selection (CS) or slave selection (SS) is the name of a digital electronics control line used to select one (or a set) of integrated circuits (commonly referred to as 'chips') out of many connected to the same device bus, typically using three-state logic.
Question 25: If MSB of control word (D7) is 0, PPI works in BSR mode.
- True
- False
Answer: a. True
Explanation:
If MSB of control word (D7) is 0, PPI works in BSR mode.