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Pipelining in Computer Architecture

By Shivangi Jain, on July 07, 2018

What is Pipelining in Computer Architecture?

The term pipeline refers to the temporal overlapping of processing. The pipelining processing in a computer is similar to assembly lines in an industrial plant. Pipelines are nothing more than assembly lines in computing that can be used either for instruction processing or, in a more general sense, for the performance of any complex operation. For achieving pipelining, one must subdivide the input process into a sequence of subprocesses, each of which can be executed by a specialized hardware stage that operates concurrently with other stages in a pipeline. The concurrent execution of subprocesses led to the tremendous improvement of system throughput in the modern digital computer.

Hardware Segments in Pipelining

In Pipelining, specialized hardware stages are also known as hardware segments, which are linearly connected to perform a fixed function over a stream of data flowing from one end to the other. A processor supporting such a hardware architecture computation is known as pipeline processor.

Pipeline processors are constructed with k processing stages. Data inputs such as operands are fed into the pipeline at the first stage S1. The processed results are passed from stage Si to stage Si+1, for all i = 1, 2, 3… k-1. The final result emerges from the pipeline at the last stage Sk. A specific control mechanism is used to pass data flow along the pipeline stages.

Types of Pipelining

There are two types of pipelining:

1. Arithmetic pipelining
2. Instruction pipelining

1. Arithmetic Pipeline

A digital computer performs fixed point or integer arithmetic and floating point arithmetic functions. In modern computers, these two functions ( i.e. the integer arithmetic and floating point arithmetic) are performed by two separate units to introduce parallelism. These units perform scalar operations involving one pair of operands at a time.

2. Instruction Pipeline

Instruction Cycle involves subcycles, such as fetch, decode, execute and store. For several instructions, these subcycles are performed simultaneously to reduce overall processing time. This process is referred to as instruction pipelining. We can apply the instruction pipelining process in the number of stages

1. Fetch: read the instruction from the memory.
2. Decode: decode the opcode and fetch source operand if necessary.
3. Execute: Perform the operation specified by the instruction.
4. Store: store the result in the destination.

As the instruction process is divided into four stages so it is also known as Four Stage Instruction Pipeline.

In this instruction pipelining, four instructions are in progress at any given time, which means that the four distinct hardware units are needed. These units are implemented in such a way that they are capable of performing their tasks simultaneously and without interfering with one another. Information from one stage is passed to the next stage with the help of the buffers.