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Computer Science Organization
Memory Organisation in Computer Architecture
By Prerana Jain, on July 08, 2018
Memory Organisation
- In the memory organization CPU generated memory request is initially referred in the cache to check the availability of data.
- If the data is available then the operation becomes hit, so respective data is transferred to CPU in the form of the word.
- If the cache is not present in the cache operation is miss so the reference will be forwarded to main memory.
- When the operation is hit in the main memory then the data transfer to cache in the form of words.
- When the operation is miss in main memory then the reference will be forwarded to secondary memory.
- Due to the secondary memory is a final level of the system supported memory the hit ratio is always 1, therefore, the data is transfer to main memory in the form of pages main memory to cache in the form of blocks and cache to CPU in the form of words.
Memory Hierarchy Design
Memory hierarchy design contain two properties,
- Inclusion
means the lower level memory data is always a subset of the higher level memory data.
- locality of reference
means CPU perform the operation on the reusable memory space.
Types of Memory Organisation
Based on the way of decreasing the system supported memory the memory organization is divided into two types:
- Simultaneously Access memory organization
- Hierarchical Access memory organization
1. Simultaneously Access Memory Organization
In this organization, the CPU can access all the level of memories without maintaining the communication between the level. When there is a miss of operation in L2 then the reference is forwarded to L2. If the operation is hit in L2 the respective data is transfer to the CPU without the involvement of level 1 of operation is missing level 2 then the reference is forwarded to level and soon.
Here,
- H1, H2, ...,Hn are the hit ratio of the respective memory level.
- T1, T2, ...Tn are the accessing times of the respective memory level.
- The time required to access one operand from the memory is called as Avg access time. It is denoted as Tavg.
2. Hierarchical Memory Organization
In this organization, the CPU performs the read and write operation only on level 1 memory. When there is a miss in level 1, the data will be transferred from the higher level 1. After allocating the data into the L1 the CPU performs the read or write operation only on L1.
A typical hierarchy is given as one goes down the hierarchy the following occur:
- Decreasing cost per bit
- Increasing capacity
- Increasing access time
- Decreasing frequency of access of the memory by the processor